• DocumentCode
    1898911
  • Title

    The SYCO Control Section Compiler

  • Author

    Mhaya, N. ; Jerraya, A.A.

  • Author_Institution
    TIM3-INPG/IMAG laboratory., 46 Avenue Felix Viallet, 38031 GRENOBLE Cedex. FRANCE.
  • fYear
    1987
  • fDate
    23-25 Sept. 1987
  • Firstpage
    249
  • Lastpage
    252
  • Abstract
    This paper describes the SYCO Control Section Compiler (CPC). The SYCO silicon compiler generates microprocessor-like circuits. Each circuit is constitueted of a data path (DP) and a control section (CS) which is a stack of control slices. The SYCO system makes use of the CPC to produce the control section from a high level description. CPC handles an hierarchical control section and involves efficient optimization mechanism. The present version of the CPC generates each control slice using a PLA. The compilation of the algorithmic description of each control slice is composed of three steps: the state table generation, the logic optimization and the PLA generation. CPC is available, the paper indicates the results of the 6502 control section compilation.
  • Keywords
    Circuit synthesis; Communication system control; Control system synthesis; Control systems; Data mining; Data structures; Laboratories; Process design; Programmable logic arrays; Silicon compiler;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-state Circuits Conference, 1987. ESSCIRC '87. 13th European
  • Conference_Location
    Taunus-Tagungs-Zentrum, F.R. Germany
  • Print_ISBN
    3800715341
  • Type

    conf

  • Filename
    5434911