CVD barriers for Cu with nanoporous ultra low-k: integration and reliability

Author

Lin, J.C. ; Augur, R. ; Shue, S.L. ; Yu, C.H. ; Liang, M.S. ; Vijayendran, A. ; de Felipe, T.Suwwan ; Danek, M.

Author_Institution

Int. Sematech, Austin, TX, USA

fYear

2002

fDate

2002

Firstpage

21

Lastpage

23

Abstract

The drive for greater integrated circuit performance has led to the need for faster interconnect systems, the development of porous ultra low-k dielectrics and thin CVD barriers. The porous structure and lower modulus of low-k dielectrics has made integration a greater challenge. In this paper, we report on an initial feasibility study on of a new spin-on nanoporous low-k dielectric with a CVD TiN(Si) barrier, for Cu dual damascene integration.

Keywords

CVD coatings; copper; dielectric thin films; diffusion barriers; integrated circuit interconnections; integrated circuit reliability; leakage currents; nanostructured materials; organic compounds; porous materials; spin coating; titanium compounds; CVD barriers; Cu dual damascene integration; Cu interconnect systems; TiN:Si-Cu; TiN:Si/Cu stack; leakage current; nanoporous ultra low-k dielectrics; porous structure; reliability; siloxane based material; spin-on nanoporous low-k dielectric; Atherosclerosis; Chemical technology; Copper; Current measurement; Dielectric materials; Integrated circuit interconnections; Integrated circuit technology; Leakage current; Nanoporous materials; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2002. Proceedings of the IEEE 2002 International

Print_ISBN

0-7803-7216-6

Type

conf

DOI

10.1109/IITC.2002.1014875

Filename

1014875