• DocumentCode
    1902075
  • Title

    Four-way processor 800 MT/s front side bus with ground referenced voltage source I/O

  • Author

    Thomas, T.P. ; Young, I.A.

  • Author_Institution
    Portland Technol. Dev., Intel Corp., Hillsboro, OR, USA
  • fYear
    2002
  • fDate
    13-15 June 2002
  • Firstpage
    70
  • Lastpage
    71
  • Abstract
    A 40 cm multi-drop bus shared by 5 test chips to emulate 4 processors and a chipset runs error free at 800 MT/s with 130 mV margin using Ground Referenced Voltage Source (GRVS) I/O scheme. For comparison, when the same test chip is programmed to use Gunning Transceiver Logic (GTL), the bus speed is 500 MT/s for the same 130 mV margin under identical conditions.
  • Keywords
    CMOS digital integrated circuits; driver circuits; system buses; 40 cm; CMOS chip; GTL; chipset; four-way processor bus; front side bus; ground referenced voltage source I/O; gunning transceiver logic; multi-drop bus; Acoustic reflection; Circuit testing; Clocks; Driver circuits; Frequency; Impedance; Logic testing; Microprocessors; Protocols; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits Digest of Technical Papers, 2002. Symposium on
  • Conference_Location
    Honolulu, HI, USA
  • Print_ISBN
    0-7803-7310-3
  • Type

    conf

  • DOI
    10.1109/VLSIC.2002.1015048
  • Filename
    1015048
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1902075