Effect of high-k materials in the control dielectric stack of nanocrystal memories

Author

Spitale, E. ; Corso, D. ; Crupi, I. ; Nicotra, G. ; Lombardo, S. ; Deleruyelle, D. ; Gely, M. ; Buffet, N. ; De Salvo, B. ; Gerardi, C.

Author_Institution

CNR-IMM, Catania, Italy

fYear

2004

fDate

21-23 Sept. 2004

Firstpage

161

Lastpage

164

Abstract

In this paper, we studied program/erase characteristics by FN tunneling in Si nanocrystal memories. Starting from a very good agreement between experimental data and simulations in the case of a memory cell with a thin tunnel oxide, silicon dots as medium for charge storage, and a CVD silicon dioxide used as control dielectric, we present estimated values of the charge trapping when a high-k material is present in the control dielectric. We then show preliminary results of nanocrystal memories with control dielectric containing high-k materials.

Keywords

CVD coatings; dielectric thin films; elemental semiconductors; flash memories; nanoelectronics; nanostructured materials; silicon; silicon compounds; tunnelling; CVD control dielectric; FLASH memories; FN tunneling; Si-SiO₂-La₂O₃; charge trapping; control dielectric stack; high-k materials; nanocrystal memories; program/erase characteristics; silicon dot charge storage medium; thin tunnel oxide memory cell; Computational modeling; High K dielectric materials; High-K gate dielectrics; Material storage; Nanocrystals; Shape control; Silicon; Steady-state; Tunneling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European

Print_ISBN

0-7803-8478-4

Type

conf

DOI

10.1109/ESSDER.2004.1356514

Filename

1356514