A model-driven based framework for rapid parallel SoC FPGA prototyping

Model-Driven Engineering (MDE) based approaches have been proposed as a solution to cope with the inefficiency of current design methods. In this context, this paper presents an MDE-based framework for rapid SIMD (Single Instruction Multiple Data) parametric parallel SoC (System-on-Chip) prototyping to deal with the ever-growing complexity of such embedded systems design process. The design flow covers the design phases from system-level modeling to FPGA prototyping. The proposed framework allows the designer to easily and automatically generate a VHDL parallel SoC configuration from a high-level system specification model using the MARTE (Modeling and Analysis of Real-Time and Embedded systems) standard profile. It is based on an IP (Intellectual Property) library and a basic parallel SoC model. The generated parallel configuration can be adapted to the data-parallel application requirements. In an experimental setting, four steps are needed to generate a parallel SoC: data-parallel programming, SoC modeling, deployment and generation process. Experimental results for a video application validate the approach and demonstrate that the proposed framework facilitates the parallel SoC exploration.