A 100 MHz timing generator for impulse radio applications

Author

Wu, Chun-Pang ; Tsao, Hen-Wai

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

2004

fDate

21-23 Sept. 2004

Firstpage

439

Lastpage

442

Abstract

The timing generator is used to generate a 100 MHz timing signal for impulse radio system with timing resolution of 19.5 ps controlled by 9-bit digital input. A fine phase interpolator is used to generate one of the 32 interpolated phases by using common gate buffered switch techniques. The timing generator achieves ±0.3LSB differential nonlinearity and ±2LSB integral nonlinearity. The chip is fabricated in a standard 0.35 μm CMOS process and consumes 55 mW power from a 3 V supply. The chip area including pads occupies 1.5×1.5 mm².

Keywords

CMOS integrated circuits; integrated circuit design; integrated circuit measurement; interpolation; signal resolution; timing circuits; transceivers; 0.35 micron; 1.5 mm; 100 MHz; 3 V; 55 mW; 9 bit; CMOS process; chip area; chip power; common gate buffered switch techniques; differential nonlinearity; digital input controlled timing resolution; fine phase interpolator; impulse radio applications; impulse radio system; impulse radio transceiver system; integral nonlinearity; interpolated phases; timing generator; timing signal; wireless communication systems; Circuits; Clocks; Delay; Digital control; Multiplexing; Pulse generation; Signal generators; Switches; Timing; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European

Print_ISBN

0-7803-8480-6

Type

conf

DOI

10.1109/ESSCIR.2004.1356712

Filename

1356712