Study of board-level noise filters to prevent transient-induced latchup in CMOS integrated circuits during EMC/ESD test

Author

Hsu, Sheng-Fu ; Ker, Ming-Dou

Author_Institution

Lab. of Nanoelectronics & Gigascale Syst., Nat. Chiao Tung Univ., Hsinchu

fYear

2006

fDate

Feb. 27 2006-March 3 2006

Firstpage

533

Lastpage

536

Abstract

Different types of board-level noise filters are evaluated for their effectiveness to improve the immunity of CMOS ICs against transient-induced latchup (TLU) under system-level electrostatic discharge (ESD) test. By choosing proper components in each noise filter network, the TLU immunity of CMOS ICs can be greatly improved. All the experimental evaluations have been verified in test chips with the silicon controlled rectifier (SCR) fabricated in a 0.25-mum CMOS technology. Some of such board-level solutions can be further integrated into the chip design to effectively improve TLU immunity of CMOS IC products

Keywords

CMOS integrated circuits; electromagnetic compatibility; electrostatic discharge; filters; thyristors; 0.25 mum; CMOS integrated circuits; EMC/ESD test; board-level noise filters; silicon controlled rectifier; system-level electrostatic discharge; transient-induced latchup; CMOS integrated circuits; CMOS technology; Circuit testing; Electromagnetic compatibility; Electrostatic discharge; Filters; Immunity testing; Integrated circuit noise; Integrated circuit testing; Thyristors;

fLanguage

English

Publisher

ieee

Conference_Titel

Electromagnetic Compatibility, 2006. EMC-Zurich 2006. 17th International Zurich Symposium on

Conference_Location

Singapore

Print_ISBN

3-9522990-3-0

Type

conf

DOI

10.1109/EMCZUR.2006.214989

Filename

1629679