Drive current enhancement by ideal junction profile using laser thermal process

In this paper, for the first time, we report the characteristics of sub-50 nm pMOSFETs using a laser thermal process (LTP) and the technique for enhancing their drive current. For the process optimization required for the technologies of sub-50 nm MOSFETs, we investigated the issues of LTP and cleared them up. S/D-extension (SDE)-junction depth, overlap and sheet resistance were controlled by pre-amorphization ion implantation (I/I) energies, and the first two parameters could be thus controlled regardless of dopant dose. This enabled us to design highly activated and abrupt box-like dopant profiles without inducing any short channel deterioration. With this technique, we achieved higher drive current pMOSFETs for the same V/sub th/-rolloff and a 13% improvement in drivability for 45 nm pMOSFETs.