Optimization of KOH wet etching process in silicon nanofabrication

The simple wet etching process for nanostructure formation seems straightforward. But, how far the wet etching process can be pushed so that it is applicable in silicon nanodevices and silicon nanostructure applications. In terms of surface roughness and achievable feature size, the impact of aqueous KOH wet etching temperature was studied for nanostructure formation with (110) silicon wafer. The grid-line patterns are generated by scanning probe lithography (SPL), which applied a bias between the tip and the (110)-oriented silicon wafer that results in an oxide hard mask for subsequent orientation-dependent etching (ODE) process. The etching rate is theoretically proportional to temperature the higher the temperature the higher the etching rate, whilst the surface roughness and the nanostructures morphology deteriorated. Owing to the etching selectivity of (111)-plane/oxide decreases as the etching temperature increases, it is found that the line-width of 20 nm nanostructure can be formed at 50°C but with poor surface roughness morphology. For the same etching depth, when the temperature changes from 50°C to 30°C the linewidth of nanostructure increases from 29 nm up to 67 nm, but surface roughness decreases from 32 nm to 3.8 nm. It is also found that the additional agitation by ultrasonic cleaner can speed up mass transfer of chemical reactants on surface of (110)-plane such that the surface roughness and morphology are further improved. We have demonstrated that: First, the optimization linewidth of the silicon nanofabrication can be reduced down to 20 nm by using higher aqueous temperature than 30°C and ODE technique with ultrasonic agitation. Second, the surface roughness of the wet etching with ultrasonic agitation is 3.282 nm which is comparable to that of dry etching (Rq = 2.101 nm) at the temperature 30°C