DocumentCode
1910136
Title
Low-Cost CMOS Process with Complete Post-Gate Implantation Scheme
Author
Kerber, M. ; Schwalke, U. ; Heinrich, R.
Author_Institution
Siemens AG, Germany
fYear
1997
fDate
22-24 September 1997
Firstpage
400
Lastpage
403
Keywords
CMOS process; CMOS technology; Costs; Doping profiles; Fabrication; Implants; MOS devices; MOSFETs; Optimized production technology; Oxidation;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference, 1997. Proceeding of the 27th European
Print_ISBN
2-86332-221-4
Type
conf
DOI
10.1109/ESSDERC.1997.194450
Filename
1503380
Link To Document