Performance prediction for parallel applications running on HPC architectures through Petri net modelling and simulation

Author

Dan Mironescu, Ion ; Vintan, Lucian

Author_Institution

Comput. Sci. Dept., Tech. Univ. of Cluj-Napoca, Cluj-Napoca, Romania

fYear

2013

fDate

5-7 Sept. 2013

Firstpage

267

Lastpage

270

Abstract

The paper presents the development of a model and a simulation technique for the prediction of the performance of a concurrent application running on a HPC architecture. Models for the hardware and software were developed using the Coloured Petri Net formalism and then coupled for the simulation. Timed simulations were performed in the Coloured Petri Net tools environment and in the Charm++ respectively the BigSim simulator. The results of both simulations for the same optimization problem show similar trends.

Keywords

Petri nets; graph colouring; parallel architectures; parallel processing; BigSim simulator; Charm++; HPC architectures; Petri net modelling; coloured Petri net formalism; optimization problem; parallel applications; performance prediction; timed simulations; Adaptation models; Computational modeling; Computer architecture; Hardware; Optimization; Predictive models; Software; HPC; Modelling and Simulation; Parallel Application; Performance prediction; Petri net;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Computer Communication and Processing (ICCP), 2013 IEEE International Conference on

Conference_Location

Cluj-Napoca

Print_ISBN

978-1-4799-1493-7

Type

conf

DOI

10.1109/ICCP.2013.6646119

Filename

6646119