DocumentCode
1912139
Title
POM: a processor model for image processing
Author
Theis, Jean-Paul ; Thiele, Lothar
Author_Institution
Applied Microelectron. Lab., Public Res Centre Henri Tudor, Luxembourg City, Luxembourg
fYear
1995
fDate
2-4 Oct 1995
Firstpage
326
Lastpage
331
Abstract
In this paper, we describe a new processor model called Periodic Operation Model (POM) that is suitable for real time image processing. First we analyze existing image processing systems in order to situate our approach. Starting from the processor architecture, we derive the corresponding algorithm class by means of a novel hardware description. Then we address the allocation and scheduling problem. We show that allocation and scheduling can be decoupled in the mapping process related to POM-processor arrays and outline the principles of an optimal mapping trajectory. We describe the outline of a novel ILP-model for allocation of POM-processor arrays which takes into account array-topology and bus bandwidth constraints. Finally we discuss implementational aspects of the POM as well as applications in image processing. We especially show that POM-processor arrays can be integrated onto single chips, thereby allowing to achieve several GOPS processing power per chip
Keywords
computational complexity; image processing; parallel processing; real-time systems; POM; Periodic Operation Model; allocation; bus bandwidth constraints; image processing; optimal mapping trajectory; processor architecture; processor model; scheduling; Application software; Clocks; Complexity theory; Costs; Image analysis; Image processing; Laboratories; Microelectronics; Processor scheduling; Shift registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-8186-7165-3
Type
conf
DOI
10.1109/ICCD.1995.528829
Filename
528829
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