A technique for improving the distortion of GaAs variable attenuator IC using squeezed-gate FET structure

This paper describes a novel technique for improving the distortion of the GaAs attenuator IC using squeezed-gate structure of MESFETs. We found that the distortion originated from the steep cutoff Id-Vgs curve of conventional FETs. To obtain smooth cutoff characteristics, we devised the squeezed-gate structure where the FETs with different threshold voltages are connected in parallel making use of the short channel effect. Fabricated IC shows 10 dB reduction of the 3rd order intermodulation distortion by optimizing the ratio of the gate widths.