DocumentCode
1916581
Title
Design and implementation of an ATM segmentation engine with PCI interface
Author
Kim, Chan ; Jun, Jong-Am ; Lee, Kyou-Ho ; Kim, Hyup-Jong
Author_Institution
Electron. & Telecommun. Res. Inst., Daejeon, South Korea
Volume
6
fYear
1998
fDate
31 May-3 Jun 1998
Firstpage
510
Abstract
This paper describes the design and implementation of an ATM segmentation engine including PCI interface. This engine, which was designed for an ASIC called ASAH-NIC, contains DMA read machine and segmentation machine. It uses local memory where control information is stored in schedule table, VC table, buffer descriptor and status queue. It has several special features like processing split packet buffers and automatic alignment and packing of transmit data
Keywords
application specific integrated circuits; asynchronous transfer mode; protocols; scheduling; system buses; ASAH-NIC; ASIC; ATM segmentation engine; DMA read machine; PCI interface; VC table; automatic alignment; buffer descriptor; local memory; schedule table; split packet buffers; status queue; Circuits; Data structures; Engines; Hardware; Joining processes; Random access memory; Registers; Tail; Virtual colonoscopy;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-4455-3
Type
conf
DOI
10.1109/ISCAS.1998.705323
Filename
705323
Link To Document