• DocumentCode
    1917593
  • Title

    The memory structures of ATLAS I, a high-performance, 16×16 ATM switch supporting backpressure

  • Author

    Pnevmatikatos, Dionisios ; Kornaros, Georgios ; Kalokerinos, George ; Xanthaki, Chara

  • Author_Institution
    Inst. of Comput. Sci., Found. for Res. & Technol., Hellas, Greece
  • fYear
    1998
  • fDate
    13-16 Sep 1998
  • Firstpage
    23
  • Lastpage
    27
  • Abstract
    We present the overall structure of ATLAS I, emphasizing the memory use and requirements. We categorize these requirements in functionality and bandwidth and present the solutions we used in the first implementation of ATLAS I in a 0.35 μ CMOS technology. This implementation can serve as a starting point in the design of future switches with functionality similar to ATLAS I
  • Keywords
    CMOS digital integrated circuits; asynchronous transfer mode; telecommunication switching; 0.35 micron; ATLAS I; CMOS technology; backpressure; bandwidth; functionality; memory structures; point-to-point serial links; single-chip ATM switch; Asynchronous transfer mode; Bandwidth; CMOS technology; Clocks; Computer science; Delay; Physical layer; Switches; Throughput; Transceivers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
  • Conference_Location
    Rochester, NY
  • ISSN
    1063-0988
  • Print_ISBN
    0-7803-4980-6
  • Type

    conf

  • DOI
    10.1109/ASIC.1998.722791
  • Filename
    722791
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1917593