Design of a Mathematical Unit in FPGAs for the Implementation of the Control of a System of Magnetic Levitation

This paper presents the design and implementation of a mathematical unit, which is generated automatically, from a program elaborated in Java that describes the circuit in VHDL, ready to be synthesized with the Xilinx ISE tool. The core contains diverse complex operations such as: mathematical functions including; sine, cosine, among others. The proposed unit is used to synthesize a sliding mode controller for a magnetic levitation system. This kind of system is used in industrial applications requiring high level mathematical calculations in small time periods. The core is designed to calculate trigonometric and arithmetic operations in such a way that each function is performed in a clock cycle. In this paper the results of the mathematical core are shown in terms of implementation, utilization and application to control a magnetic levitation system.