• DocumentCode
    1921814
  • Title

    Integration of Innovative Process Modules in a Full 0.35 μm CMOS Process and Circuit Demonstration

  • Author

    Haond, M. ; Lerme, M.

  • Author_Institution
    GRESSI, BP98, 38243 Meylan Cedex, France.; France Telecom-CNET, Chemin du Vieux Chêne, BP98, 38243 Meylan Cedex, France.
  • fYear
    1994
  • fDate
    11-15 Sept. 1994
  • Firstpage
    793
  • Lastpage
    800
  • Abstract
    0.35 ??m CMOS process modules have been developed with the aim of further validation on 200 mm wafers in industrial environment. Lithography, isolation, device architecture and Chemical Mechanical Polishing (CMP) are discussed. A 3-level metallisation scheme is demonstrated with CMP process and CVD Ti/TiN barriers. Integration of the modules is demonstrated on ULSI circuits.
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1994. ESSDERC '94. 24th European
  • Conference_Location
    Edinburgh, Scotland
  • Print_ISBN
    0863321579
  • Type

    conf

  • Filename
    5435839
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1921814