• DocumentCode
    1926120
  • Title

    0.2μm Gate AlGaAs/GaAs HIGFETt (Heterostructure Insulated gate FET) with a (111) face of n+-GaAs selectively grown by MOCVD

  • Author

    Umemoto, Y. ; Matsumoto, H. ; Hiruma, K. ; Ohishi, Y. ; Oda, H. ; Takahama, M. ; Miyazaki, M. ; Imamura, Y.

  • Author_Institution
    Hitachi VLSI Engineering Corporation, Japan
  • fYear
    1991
  • fDate
    17-19 June 1991
  • Abstract
    A new GaAs HIGFET with K-value of 1A/V2/mm has been developed for application to high-speed LSIs. This paper describes three essential processes for fabricating this HIGFET: (1) a new gate process using a (111) face appearing on selectively-grown n+-GaAs, for both achieving a 0.2-μm gate and reducing the short channel effect; (2) a highly-doped GaAs channel grown by MBE, for increasing the K-value; and (3) a technique for establishing side contact between the n+-GaAs and the n-GaAs channel, for minimizing a source resistance.
  • Keywords
    Annealing; Artificial intelligence; Contact resistance; Etching; FETs; Gallium arsenide; Insulation; MOCVD; Thickness measurement; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference, 1991. 49th Annual
  • Conference_Location
    Boulder, CO
  • Print_ISBN
    0-87942-647-0
  • Type

    conf

  • DOI
    10.1109/DRC.1991.664694
  • Filename
    664694
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1926120