Comparison of fast radix 2 ACS with adaptive fast radix 2 ACS in Viterbi Decoder

Author

Bobby, N.D. ; Srivatsa, S.K. ; Kishore, L. ; Rajiv, A. ; Suresh, S.S.

Author_Institution

Veltech Hightech DrRangarajan Dr Shakunthala Eng. Coll., Chennai, India

fYear

2013

fDate

7-9 Jan. 2013

Firstpage

1

Lastpage

5

Abstract

Adaptive Viterbi decoder is used for decoding codes of long constraint length, where as viterbi decoder is used for decoding short constraint lengths. In order to minimize power consumption and BER, we have implemented FastRadix 2 ACS in Viterbi decoder and Adaptive Viterbi decoder. The area consumption was more in Viterbi compared to Adaptive Viterbi decoder. But the power utilization reduced drastically to 20% where as in Viterbi decoder the power consumed was 80%. In our previous work we have implemented Adaptive fast ACS, Adaptive Radix2 acs in Viterbi decoder. But the experimental result proves power consumption is less in Adaptive FastRadix 2 ACS in Viterbi decoder than FastRadix 2 ACS in Viterbi decoder.

Keywords

Viterbi decoding; Adaptive Radix2 acs; adaptive fast radix 2 ACS; adaptive viterbi decoder; constraint length; decoding codes; power consumption; Bit error rate; Decoding; IP networks; Logic gates; Measurement; Very large scale integration; Viterbi algorithm; ACS; AVD; FPGA; Fast Radix 2 Acs; Fastacs; Radix 2 ACS; VLSI; Viterbi Decoding;

fLanguage

English

Publisher

ieee

Conference_Titel

Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT), 2013 International Conference on

Conference_Location

Tiruvannamalai

Print_ISBN

978-1-4673-5300-7

Type

conf

DOI

10.1109/ICEVENT.2013.6496563

Filename

6496563