DocumentCode
1934809
Title
Motorola´s 88000: integration, performance and applications
Author
Goss, Rich
Author_Institution
Motorola Inc., Sunnyvale, CA, USA
fYear
1989
fDate
Feb. 27 1989-March 3 1989
Firstpage
20
Lastpage
26
Abstract
A discussion is presented of Motorola´s microprocessor family, the 88000. Specifically, the 88100 central processing unit and the 88200 cache/memory management unit are addressed. Topics covered include the architecture, integration, performance, and applications for the chip set.<>
Keywords
microprocessor chips; 88100 central processing unit; 88200 cache/memory management unit; Motorola 88000 microprocessor family; integration; performance; Algorithms; Application software; Central Processing Unit; Computer architecture; Decoding; Memory management; Microprocessors; Pipelines; Reduced instruction set computing; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
COMPCON Spring '89. Thirty-Fourth IEEE Computer Society International Conference: Intellectual Leverage, Digest of Papers.
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-8186-1909-0
Type
conf
DOI
10.1109/CMPCON.1989.301897
Filename
301897
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