DocumentCode
1935087
Title
Explanation for the Negative Differential Resistance in SOI-MOSFETs
Author
Mcdaid, J. ; Hall, S. ; Mellor, P.H. ; Eccleston, W. ; Alderman, J.C.
Author_Institution
The University of Liverpool, Department of Electrical Engineering and Electronics, Brownlow Hill, P.O. Box 147, Liverpool, L69 3BX.
fYear
1989
fDate
11-14 Sept. 1989
Firstpage
885
Lastpage
888
Abstract
The negative resistance region seen in the output characteristics (IDS (VGS ) vs vDS ) of silicon-on-insulator MOSFETs to be a result of the relatively poor thermal properties of the buried insulator compared with the Si-substrate. At sufficiently high power levels, the device island heats up causing degradation of the carrier mobility and a consequent limiting of the outptrt current This thermal self-limiting is also responsible for the deaparture from the ideal MOSFET ``square´´ law which should be evident for these transistors having minimal ``body´´ effect.
Keywords
Conductive films; Equations; Immune system; Insulation; MOSFETs; Semiconductor films; Silicon on insulator technology; Thermal resistance; Thin film devices; Thin film transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location
Berlin, Germany
Print_ISBN
0387510001
Type
conf
Filename
5436463
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