Methodology for the digital calibration of analog circuits and systems using sub-binary radix DACs

This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub-binary radix M/2⁺M DAC, which has the advantage of allowing reaching arbitrarily high resolutions at the cost of extremely small area. The methodology proposed allows the removal of any type of imperfections, at the expense of two shift registers, a few logical gates and a DAC which is smaller than the shift register.