DocumentCode
1937442
Title
Physical Analysis of Peripheral Base Currents in an Advanced Polysilicon Self-aligned Bipolar Tranisistor Structure
Author
Chantre, A. ; Giroult, G. ; Nouailhat, A.
Author_Institution
CNET/CNS, B.P. 98, Chemin du Vieux Chêne, F-38243 MEYLAN CEDEX, FRANCE
fYear
1989
fDate
11-14 Sept. 1989
Firstpage
469
Lastpage
472
Abstract
The emitter/base junction properties of a CMOS compatible bipolar transistor structure have been studied. Dry etching induced damage occuring at the polysilicon emitter patterning level is found to account for the observed poor low current gain behaviour. Simple modifications of the device design are described and shown to result in high performance DC characteristics.
Keywords
Bipolar transistors; Boron; CMOS process; CMOS technology; Dry etching; Fabrication; Temperature dependence; Temperature distribution; Thermal factors; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location
Berlin, Germany
Print_ISBN
0387510001
Type
conf
Filename
5436569
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