An implementation and analysis of programmable Doppler filter bank using ADSP21060S

Doppler filter bank (DFB) is the heart of pulsed Doppler radars. It provides the residue clutter elimination and coherent integration. With the improvement of digital signal processors (DSPs), the implementation using them is becoming more common. Generally, for the DFB to process the input data in real time, the parallel processing concept using multiple DSPs is used. This paper presents the implementation of a programmable DFB using ADSP21060s. By analyzing the transfer rate of the data received during coherent processing interval (CPI) and formulating the time required to compute the algorithm, the total processing time and the number of ADSP21060s to implement the DFB are estimated.