Effect of Impact-Ionization-Generated Holes on the Breakdown Mechanism in LDMOS Devices

Author

Sakuda, T. ; Sadachika, N. ; Oritsuki, Y. ; Yokomichi, M. ; Miyake, M. ; Kajiwara, T. ; Kikuchihara, H. ; Feldmann, U. ; Mattausch, H.J. ; Miura-Mattausch, M.

Author_Institution

Grad. Sch. of Adv. Sci. of Matter, Hiroshima Univ., Higashi-Hiroshima, Japan

fYear

2009

fDate

9-11 Sept. 2009

Firstpage

1

Lastpage

4

Abstract

The breakdown mechanism in LDMOS devices with high resistive drift region sustaining high-voltage applications is analyzed and explained. Holes generated by the impact-ionization in the drift region are found to hinder the formation of the breakdown condition by increasing the potential underneath the gate-overlap region. This mechanism is modeled and implemented into the compact model HiSIM_HV for circuit simulation. Good agreement of simulated characteristics with 2D-device simulation results has been achieved.

Keywords

impact ionisation; power MOSFET; semiconductor device breakdown; semiconductor device models; 2D device simulation; LDMOS devices; MOSFET; breakdown mechanism; gate-overlap region; high-resistive drift region; high-voltage application; hole generation; impact ionization; Breakdown voltage; Circuit simulation; Electric breakdown; Impact ionization; Impurities; MOSFETs;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices, 2009. SISPAD '09. International Conference on

Conference_Location

San Diego, CA

ISSN

1946-1569

Print_ISBN

978-1-4244-3974-8

Electronic_ISBN

1946-1569

Type

conf

DOI

10.1109/SISPAD.2009.5290211

Filename

5290211