DocumentCode
1948223
Title
A voltage-regulated static keeper technique for high-performance ASICs
Author
Kanno, Hiroshi ; Saeki, Takanori ; Abiko, Hitoshi ; Kubo, Akira ; Tokashiki, Ken
Author_Institution
ULSI Device Dev. Lab., NEC Corp., Sagamihara, Japan
fYear
1998
fDate
13-16 Sep 1998
Firstpage
361
Lastpage
364
Abstract
A Voltage-Regulated Static Keeper (VRSK) technique is proposed. The VRSK can be applied to any dynamic circuit without size optimization and dissipates only one-third power of a static keeper. A 4-bit demultiplexer incorporating the VRSK can operate up to 2.0 GHz with a power consumption of only 5.8 mW
Keywords
CMOS integrated circuits; application specific integrated circuits; demultiplexing equipment; low-power electronics; voltage regulators; 0.18 micron; 2 GHz; 5.8 mW; CMOS technology; demultiplexer; dynamic circuit; high-performance ASICs; voltage-regulated static keeper; Application specific integrated circuits; CMOS technology; Energy consumption; Feedback circuits; Frequency; Inverters; Rail to rail operation; Regulators; Virtual reality; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
Conference_Location
Rochester, NY
ISSN
1063-0988
Print_ISBN
0-7803-4980-6
Type
conf
DOI
10.1109/ASIC.1998.723036
Filename
723036
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