DocumentCode
1949450
Title
General in-place scheduling for the Viterbi algorithm
Author
Lin, Horng-Dar ; Shung, C. Bernard
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1991
fDate
14-17 Apr 1991
Firstpage
1577
Abstract
It is shown how to find in-place schedules for all kinds of trellises, including periodic and aperiodic in-place schedules. It is also shown how to verify the existence of aperiodic and periodic in-place schedules. With this in-place scheduling, one can improve data locality and thus reduce interprocessor communication bandwidths. This means a smaller overhead in chip routing area or communication cycles. The methods also apply to general parallel processing with trellis-like computational graphs
Keywords
decoding; encoding; signal processing; Viterbi algorithm; aperiodic in-place schedules; chip routing area; communication cycles; data locality; decoding; encoding; interprocessor communication bandwidths; parallel processing; periodic in-place schedules; trellis-like computational graphs; Convolutional codes; Costs; Dynamic programming; Interference; Markov processes; Maximum likelihood decoding; Maximum likelihood detection; Processor scheduling; Speech recognition; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on
Conference_Location
Toronto, Ont.
ISSN
1520-6149
Print_ISBN
0-7803-0003-3
Type
conf
DOI
10.1109/ICASSP.1991.150551
Filename
150551
Link To Document