DocumentCode
1953018
Title
FPGA implementation of a strong Reversi player
Author
Olivito, Javier ; González, Carlos ; Resano, Javier
Author_Institution
DIIS-I3A, Univ. of Zaragoza, Zaragoza, Spain
fYear
2010
fDate
8-10 Dec. 2010
Firstpage
507
Lastpage
510
Abstract
In this article, we present a design of a Reversi player submitted to the FPT´10 Design Competition and implemented on a XC2VP30 Virtex-II Pro FPGA. Our player applies several techniques to explore the solution space attempting to look as many moves forward as possible for the given time, and uses several metrics to evaluate the quality of a given board. The most important metric is the mobility, basically our player attempts to maximise its available moves whereas minimising the opponent moves. With these techniques our player easily defeats the competition software opponent.
Keywords
computer games; field programmable gate arrays; FPGA implementation; FPT´10 Design Competition; XC2VP30 Virtex-II Pro FPGA; competition software opponent; strong Reversi player; Color; Computer architecture; Computers; Field programmable gate arrays; Games; Iterative methods; Software;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology (FPT), 2010 International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-8980-0
Type
conf
DOI
10.1109/FPT.2010.5681469
Filename
5681469
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