From Concurrent Multi-clock Programs to Deterministic Asynchronous Implementations

Author

Potop-Butucaru, Dumitru ; De Simone, Robert ; Sorel, Yves ; Talpin, Jean-Pierre

Author_Institution

INRIA, France

fYear

2009

fDate

1-3 July 2009

Firstpage

42

Lastpage

51

Abstract

We propose a general method to characterize and synthesize correctness-preserving, asynchronous wrappers for synchronous processes on a globally asynchronous locally synchronous (GALS) architecture. Based on the theory of weakly endochronous systems, our technique uses a compact representation of the abstract synchronization configurations of the analyzed process to determine a minimal set of synchronization patterns generating all possible reactions.

Keywords

clock and data recovery circuits; concurrent engineering; data flow computing; deterministic algorithms; concurrent multiclock programs; deterministic asynchronous implementation; globally asynchronous locally synchronous architecture; synchronous programming; Application software; Circuit simulation; Coherence; Concurrent computing; Control system synthesis; Digital circuits; Embedded software; Embedded system; Pattern analysis; Synchronization; GALS; asynchronous implementation; synchronous specification; weak endochrony;

fLanguage

English

Publisher

ieee

Conference_Titel

Application of Concurrency to System Design, 2009. ACSD '09. Ninth International Conference on

Conference_Location

Augsburg

ISSN

1550-4808

Print_ISBN

978-0-7695-3697-2

Type

conf

DOI

10.1109/ACSD.2009.23

Filename

5291071