• DocumentCode
    1958417
  • Title

    An algorithm for simultaneous pin assignment and routing

  • Author

    Hua Xiang ; Xiaoping Tang ; Wong, D.F.

  • Author_Institution
    Texas Univ., Austin, TX, USA
  • fYear
    2001
  • fDate
    4-8 Nov. 2001
  • Firstpage
    232
  • Lastpage
    238
  • Abstract
    Macro-block pin assignment and routing are important tasks in physical design planning. Existing algorithms for these problems can be classified into two categories: 1) a two-step approach where pin assignment is followed by routing, and 2) a net-by-net approach where pin assignment and routing for a single net are performed simultaneously. None of the existing algorithms is "exact" in the sense that the algorithm may fail to route all nets even though a feasible solution exists. This remains to be true even if only 2-pin nets between two blocks are concerned. In this paper, we present the first polynomial-time exact algorithm for simultaneous pin assignment and routing for 2-pin nets from one block (source block) to all other blocks. In addition to finding a feasible solution whenever one exists, it guarantees to find a pin-assignment/routing solution with minimum cost /spl alpha//spl middot/W + /spl beta//spl middot/V, where W is the total wirelength and V is the total number of vias. Our algorithm has various applications and is applicable to both global and detailed routing with arbitrary routing obstacles on multiple layers. Experimental results demonstrate its efficiency and effectiveness.
  • Keywords
    VLSI; circuit layout CAD; graph theory; integrated circuit layout; network routing; 2-pin nets; VLSI design; detailed routing; engineering change order situations; global routing; macro-block tasks; minimum cost; physical design planning; polynomial-time exact algorithm; routing cost; simultaneous pin assignment and routing; Algorithm design and analysis; Circuits; Costs; Design engineering; Pins; Polynomials; Routing; Runtime; Shape; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA, USA
  • ISSN
    1092-3152
  • Print_ISBN
    0-7803-7247-6
  • Type

    conf

  • DOI
    10.1109/ICCAD.2001.968623
  • Filename
    968623