Energy efficient real-time scheduling [microprocessors]

Author

Sinha, A. ; Chandrakasan, A.P.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA

fYear

2001

fDate

4-8 Nov. 2001

Firstpage

458

Lastpage

463

Abstract

Real-time scheduling on processors that support dynamic voltage and frequency scaling is analyzed. The Slacked Earliest Deadline First (SEDF) algorithm is proposed and it is shown that the algorithm is optimal in minimizing processor energy consumption and maximum lateness. An upper bound on the processor energy savings is also derived. Real-time scheduling of periodic tasks is also analyzed and optimal voltage and frequency allocation for a given task set is determined that guarantees schedulability and minimizes energy consumption.

Keywords

microprocessor chips; processor scheduling; real-time systems; SEDF algorithm; dynamic frequency scaling; dynamic voltage scaling; energy efficient scheduling; energy saving upper bound; microprocessors; optimal frequency allocation; optimal voltage allocation; periodic task scheduling; processor energy consumption; real-time scheduling; schedulability criteria; slacked earliest deadline first algorithm; Batteries; Dynamic scheduling; Dynamic voltage scaling; Energy consumption; Energy efficiency; Frequency; Heuristic algorithms; Job shop scheduling; Processor scheduling; Scheduling algorithm;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on

Conference_Location

San Jose, CA, USA

ISSN

1092-3152

Print_ISBN

0-7803-7247-6

Type

conf

DOI

10.1109/ICCAD.2001.968679

Filename

968679