A 14 µA ECG processor with robust heart rate monitor for a wearable healthcare system

Author

Izumi, Shintaro ; Yamashita, Katsumi ; Nakano, M. ; Konishi, Tsuyoshi ; Kawaguchi, Hitoshi ; Kimura, Hiromitsu ; Marumoto, Kyoji ; Fuchikami, Takaaki ; Fujimori, Yoshikazu ; Nakajima, Hiromasa ; Shiga, Toshikazu ; Yoshimoto, Masahiko

Author_Institution

Kobe Univ., Kobe, Japan

fYear

2013

fDate

16-20 Sept. 2013

Firstpage

145

Lastpage

148

Abstract

This report describes an electrocardiograph (ECG) processor for use with a wearable healthcare system. It comprises an analog front end, a 12-bit ADC, a robust Instantaneous Heart Rate (IHR) monitor, a 32-bit Cortex-M0 core, and 64 Kbyte Ferroelectric Random Access Memory (FeRAM). The IHR monitor uses a short-term autocorrelation (STAC) algorithm to improve the heart-rate detection accuracy despite its use in noisy conditions. The ECG processor chip consumes 13.7 μA for heart rate logging application.

Keywords

analogue-digital conversion; electrocardiography; ferroelectric storage; health care; random-access storage; ADC; Cortex-M0 core; ECG processor; FeRAM; analog front end; current 13.7 muA; current 14 muA; ferroelectric random access memory; heart rate detection accuracy; heart rate monitor; instantaneous heart rate monitor; noisy condition; short-term autocorrelation algorithm; wearable healthcare system; word length 12 bit; word length 32 bit; Biomedical monitoring; Electrocardiography; Ferroelectric films; Heart rate; Monitoring; Nonvolatile memory; Random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

ESSCIRC (ESSCIRC), 2013 Proceedings of the

Conference_Location

Bucharest

ISSN

1930-8833

Print_ISBN

978-1-4799-0643-7

Type

conf

DOI

10.1109/ESSCIRC.2013.6649093

Filename

6649093