DocumentCode
1968798
Title
A choice of SM/DM parallel ANN implementation for embedded applications
Author
Dvorak, Vaclav ; Cejka, Rudolf
Author_Institution
Dept. of Comput. Sci., Brno Univ. of Technol., Czech Republic
fYear
2000
fDate
2000
Firstpage
18
Lastpage
23
Abstract
This paper examines implementations of a multi-layer perceptron (MLP) on bus-based shared memory (SM) and on distributed memory (DM) multiprocessor systems. The goal has been to optimize HW and SW architectures in order to obtain the fastest response possible. Prototyping parallel MLP algorithms for up to 8 processing nodes with the DM as well as SM memory was done using CSP-based TRANSIM tool. The results of prototyping MLPs of different sizes on various number of processing nodes demonstrate the feasible speedups, efficiency and time responses for the given CPU speed, link speed or bus bandwidth
Keywords
distributed memory systems; multilayer perceptrons; parallel architectures; shared memory systems; bus-based shared memory; distributed memory; multi-layer perceptron; parallel ANN implementation; parallel MLP algorithms; Delta modulation; Samarium;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering of Computer Based Systems, 2000. (ECBS 2000) Proceedings. Seventh IEEE International Conference and Workshopon the
Conference_Location
Edinburgh
Print_ISBN
0-7695-0604-6
Type
conf
DOI
10.1109/ECBS.2000.839857
Filename
839857
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