Characterization of surface- and buried-channel detection transistors for CCD on-chip amplifiers

Author

Centen, P.G. ; Roks, E.

Author_Institution

Philips Imaging Technol., Eindhoven, Netherlands

fYear

1997

fDate

10-10 Dec. 1997

Firstpage

193

Lastpage

196

Abstract

Low noise floating-diffusion amplifiers, made in double and single layer membrane poly-Si technology, are characterized including scaling rules for the 1/f noise, thermal noise, 3 dB bandwidth and conversion gain. A comparison is made between buried- and surface-channel detection node transistors for various channel widths, lengths, and bias currents. A new method for measuring the total detection node capacitance is used. The results are modeled using a noise model that includes shot noise from hot-electron effects.

Keywords

1/f noise; MOSFET; amplifiers; capacitance; charge-coupled device circuits; hot carriers; shot noise; thermal noise; 1/f noise; CCD on-chip amplifier; Si; bandwidth; buried-channel detection transistor; conversion gain; double layer membrane poly-Si technology; floating-diffusion amplifier; hot-electron effect; node capacitance measurement; noise model; scaling rule; shot noise; single layer membrane poly-Si technology; surface-channel detection transistor; thermal noise; Biomembranes; Charge coupled devices; Clocks; Frequency; MOSFETs; Noise generators; Pixel; Predictive models; Signal to noise ratio; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-4100-7

Type

conf

DOI

10.1109/IEDM.1997.650311

Filename

650311