A very low voltage 9th order linear phase baseband switched capacitor filter

Author

Goravanchi, P. ; Hashemipour, O. ; Sedaghat, R.

Author_Institution

Dept. of Electr. & Comput. Eng., Beheshti Univ., Tehran, Iran

Volume

1

fYear

2003

fDate

4-7 May 2003

Firstpage

151

Abstract

A very low voltage 9th order linear phase baseband switched capacitor (SC) filter has been designed to be used as part of a cellular GSM (Global System Mobile) receiver. A Gaussian-to-6dB filter of the order of seven is chosen and a second order function is added to reduce the group delay variations around 1 μs. The filter uses a fully differential topology to increase the dynamic range and reduce the clock feed-through noise and the distortion due to low voltage amplifier. The flicker noise is reduced by using a chopper stabilization technique in opamp design. In order to reduce the charge injection two methods of delayed clock phases and dummy switches are used. The filter is realized by cascading the biquad sections. The filter has been designed in a 0.35 μm CMOS technology and simulated with Hspice using BSIM 3V3 model. The filter operates at 2 MHz sampling frequency and 1 MHz chopping frequency with a corner frequency of 100 kHz and 7 mW power consumption.

Keywords

CMOS integrated circuits; biquadratic filters; cellular radio; flicker noise; integrated circuit noise; linear phase filters; network topology; operational amplifiers; switched capacitor filters; 1 MHz; 100 kHz; 2 MHz; 7 mW; BSIM 3V3 model; Hspice; cellular GSM receiver; chopper stabilization technique; flicker noise; linear phase baseband switched capacitor filter; low voltage analog circuit; opamp design; 1f noise; Baseband; CMOS technology; Capacitors; Clocks; Delay; Frequency; GSM; Low voltage; Nonlinear filters;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2003. IEEE CCECE 2003. Canadian Conference on

ISSN

0840-7789

Print_ISBN

0-7803-7781-8

Type

conf

DOI

10.1109/CCECE.2003.1226365

Filename

1226365