DocumentCode
1982286
Title
Exploiting hierarchy for multiple error correction in combinational circuits
Author
Hoffmann, Dirk W. ; Kropf, Thomas
Author_Institution
Inst. for Comput. Eng., Tubingen Univ., Germany
fYear
2000
fDate
2000
Firstpage
758
Abstract
Summary form only given. Multiple error rectification is a challenging task since the search space grows exponentially with the number of design errors. This method is a symbolic method for multiple error rectification of combinational circuits and further development that can correct single errors, only. The main characteristics of our approach are summarized
Keywords
automatic testing; combinational circuits; error correction; logic testing; symbol manipulation; combinational circuits; design errors; multiple error correction; search space; symbolic method; Adders; Automatic test pattern generation; Combinational circuits; Computer errors; Cost function; Design engineering; Error correction; Power engineering and energy; Power engineering computing; Rectifiers;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location
Paris
Print_ISBN
0-7695-0537-6
Type
conf
DOI
10.1109/DATE.2000.840891
Filename
840891
Link To Document