A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologies

This paper describes a high-voltage-enabling circuit technique for enhancing the gain precision and linearity of OpAmp-based analog circuits. Without resorting from specialized devices, a 2xV_DD-enabled recycling folded cascode (RFC) OpAmp optimized in IV GP 65-nm CMOS achieves, when compared with its 1xV_DD counterpart, 25-dB higher open-loop DC gain and 30-dB higher IM3 (in closed loop), under a similar power budget. These joint improvements save the need of a 2^nd stage in the OpAmp when high precision and high linearity are the priorities. A voltage-conscious bias scheme and gate-drain-source engineering ensure that all devices are consistently operated within the reliability limits.