• DocumentCode
    1992194
  • Title

    SET tolerance of 65 nm CMOS majority voters: A comparative study

  • Author

    Danilov, Igor A. ; Gorbunov, Maxim S. ; Antonov, A.A.

  • Author_Institution
    Sci. Res. Inst. of Syst. Anal., Moscow, Russia
  • fYear
    2013
  • fDate
    23-27 Sept. 2013
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    We study the design of different majority voters based on a commercial 65 nm CMOS technology, propose the test system and discuss the experimental results of heavy ion irradiation campaign and the proposed relative efficiency criterion for choosing the voter for a given TMR strategy.
  • Keywords
    CMOS integrated circuits; radiation hardening (electronics); CMOS majority voters; SET tolerance; TMR strategy; heavy ion irradiation campaign; single-event transient; size 65 nm; triple-modular redundancy technique; CMOS integrated circuits; Fault tolerance; Field programmable gate arrays; Flip-flops; Registers; Sensitivity; Tunneling magnetoresistance; CMOS; DICE; SET; TMR; critical charge; heavy ions; majority voter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radiation and Its Effects on Components and Systems (RADECS), 2013 14th European Conference on
  • Conference_Location
    Oxford
  • Type

    conf

  • DOI
    10.1109/RADECS.2013.6937384
  • Filename
    6937384
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1992194