Modeling and analysis of nonlinearities and bandwidth limitations in RF receivers

Reduction of the power consumption of analog circuits used in RF receivers, leads to decreased linearity. Digital algorithms can be used in the receiver to compensate for the distortion components that are created due to this. This leads to a trade-off between power consumption in the analog domain and digital domain. Most research concerning this topic concentrates on signal processing, and uses a polynomial to model the nonlinear effects observed in these circuits. Often memory effects are not taken into account, and the polynomials used are only able to model weakly nonlinear behavior. In this paper the behavior of RF circuits is analyzed leading to a look-up table model, which is able to compensate strongly nonlinear circuits including memory effects. To validate the discussed model, measurements are performed on a low noise amplifier.