A 160 Gbit/s large-capacity ATM switching system using a dynamic link speed controlled switch architecture

Author

Doi, Yukihiro ; Yamada, Hiroki

Author_Institution

NTT Commun. Switching Labs., Tokyo, Japan

fYear

1993

fDate

29 Nov-2 Dec 1993

Firstpage

24

Abstract

This paper describes the architecture and implementation of a 160 Gbit/s ATM switch based on CMOS LSI technology. To construct the switch, a new high-speed switch element using dynamic link speed control is proposed. Each element offers 16 2.4 Gbit/s ports and employs the parallel memory accessing technique with bit slice LSI fabrication. The switch element achieves double the throughput of conventional switch elements. Using the proposed switch elements, a 160 Gbit/s throughput large capacity ATM switching system can be realized. The prototype of ATM switching system using proposed switch architecture was developed

Keywords

B-ISDN; CMOS integrated circuits; asynchronous transfer mode; electronic switching systems; large scale integration; 160 MB/s; ATM switching system; BISDN; CMOS LSI technology; bit slice LSI fabrication; dynamic link speed control; high-speed switch element; parallel memory accessing technique; switch architecture; throughput; Asynchronous transfer mode; Communication switching; Communication system control; Control systems; Hardware; Large scale integration; Optical switches; Prototypes; Switching systems; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Global Telecommunications Conference, 1993, including a Communications Theory Mini-Conference. Technical Program Conference Record, IEEE in Houston. GLOBECOM '93., IEEE

Conference_Location

Houston, TX

Print_ISBN

0-7803-0917-0

Type

conf

DOI

10.1109/GLOCOM.1993.318092

Filename

318092