A generic voltage comparator analog cell produced in standard digital CMOS technologies

A voltage comparator has been developed to be employed as an analog cell in standard digital CMOS processes. The design is generic to a variety of CMOS technologies with various minimum feature sizes. The comparator was used in a mixed-signal application built in a Hewlett-Packard 1.2 μm process and operated from a single 5 V power supply. The circuit was later built in 0.8 μm and 2.0 μm HP processes provided by MOSIS. All of the samples achieved a measured nominal input offset voltage of less than 2 mV without using any input offset voltage correction technique, and had 1 mV sensitivity regardless of the chosen process. The typical response time of the comparator with a 10 mV differential input signal was 33 ns, 80 ns, and 20 ns for circuits built in 1.2 μm, 2.0 μm and 0.8 μm technologies, respectively