Keynote 2 NoC´s at the center of chip architecture: Urgent needs (today) and what they must become (future)

The collision of large-scale computational capabilities (multi-core) and system-scale integration (system-on-chip) have produced a landscape in which networks-on-chip are a central critical element of system design. However, the traditional approaches and requirements from these two communities are quite different with divergence in requirements of cost, regularity, power, methodology, compatibility, features, etc. This talk will survey the landscape of modern NoC design, and point out challenging new opportunities and directions for the NoC research community. Open challenges include-how to reconcile performance with cost, what functions are within scope for NoC, how to reconcile performance with heterogeneity, how to reconcile performance with long-term compatibility, and so on. The central architectural importance of networks-on-chip are now clear, the challenges are to define the architectural approaches and paths which enable robust, efficient, high-performance, cost-effective, and of course rapidly designed systems.