A 800 MHz PowerPC SOC with PCI-X DDR266, DDRII-667, and RAID assist

Author

Boudon, By Gerard ; Wall, Alan ; Foster, Joe ; Wolford, Barry ; Fakiris, John

Author_Institution

IBM Microelectron., Corbeil-Essonnes, France

fYear

2004

fDate

12-15 Sept. 2004

Firstpage

183

Lastpage

186

Abstract

A PowerPC system-on-a-chip processor which integrates high speed state of the art 800 MHz PowerPC, DDRII-667 memory controller, RAID assist logic, and three PCI-X DDR266 interfaces with a rich mix of conventional peripherals is described. The PowerPC, with on-chip L2 cache enabled, executes up to 1600 DMIPS. The RAID assist logic is capable of transferring 2 Gbytes/sec. The state of the art PowerPC, the high bandwidth data pipes, and the RAID assist logic make the SOC an ideal solution for RAID controller applications. Active power consumption is as low as 6W with a 1.5 volt supply. The SOC has been implemented in a 0.13 μm, 1.5 V nominal-supply, bulk CMOS process.

Keywords

CMOS digital integrated circuits; DRAM chips; RAID; cache storage; microprocessor chips; system-on-chip; 0.13 micron; 1.5 V; 2 Gbyte/s; 6 W; 800 MHz; DDRII-667; IOP processor; PCI-X DDR; PCI-X DDR266; PowerPC SOC; RAID assist logic; RAID controller; SDRAM DDRII; bulk CMOS process; data pipes; memory controller; on-chip L2 cache; system-on-a-chip processor; Acceleration; Bandwidth; CMOS logic circuits; CMOS process; CMOS technology; Delay; Hardware; Microelectronics; SDRAM; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2004. Proceedings. IEEE International

Print_ISBN

0-7803-8445-8

Type

conf

DOI

10.1109/SOCC.2004.1362402

Filename

1362402