• DocumentCode
    2010054
  • Title

    Supporting highly speculative execution via adaptive branch trees

  • Author

    Chen, Tien-Fu

  • Author_Institution
    Dept. of Comput. Sci., Nat. Chung Cheng Univ., Chiayi, Taiwan
  • fYear
    1998
  • fDate
    1-4 Feb 1998
  • Firstpage
    185
  • Lastpage
    194
  • Abstract
    Most of the prediction mechanisms predict a single path to continue the execution on a branch. Alternatively, we may exploit parallelism from either possible paths of a branch, discarding wrong paths once the branch is resolved. This paper proposes a concept of adaptive branch trees (ABT) to support highly speculative execution for processors with deeper pipelines and wide issue widths. The basic idea of the adaptive branch tree is to dynamically keep track of alternative branch paths and to speculatively execute the code on the most likely path. Hence, unlike branch prediction mechanisms, the ABT scheme would not miss out misprediction paths since the scheme can eventually go back to other alternative paths when the machine has explored more pending branches. The branch tree is realized by an adaptive branch tree table. A token is associated with each basic block and operations in the entire basic blocks are tagged with the token. With a novel token assignment strategy, we can reconfigure the ABT by a shift operation once one branch is resolved. Our experiment results on the SPEC95 benchmarks show that the proposed approach can achieve significant branch penalty reduction for wide-issue processors
  • Keywords
    instruction sets; microprogramming; parallel architectures; parallel programming; program control structures; software performance evaluation; trees (mathematics); ABT scheme; SPEC95 benchmarks; adaptive branch tree table; adaptive branch trees; branch penalty reduction; branch prediction mechanisms; experiment; parallelism; prediction mechanisms; shift operation; speculative execution; token assignment strategy; wide-issue processors; Accuracy; Clocks; Computer science; Councils; Parallel processing; Pipelines; Shape;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High-Performance Computer Architecture, 1998. Proceedings., 1998 Fourth International Symposium on
  • Conference_Location
    Las Vegas, NV
  • Print_ISBN
    0-8186-8323-6
  • Type

    conf

  • DOI
    10.1109/HPCA.1998.650558
  • Filename
    650558