• DocumentCode
    2012548
  • Title

    Memory Power Modeling - A Novel Approach

  • Author

    Gupte, Ajit ; Sharma, Mohit ; Varshney, Gaurav ; Holla, Lakshmikantha ; Rana, Parvinder ; Udayakumar, H.

  • Author_Institution
    Texas Instrum. India Ltd., Dallas, TX
  • fYear
    2008
  • fDate
    7-9 April 2008
  • Firstpage
    263
  • Lastpage
    268
  • Abstract
    Low power consumption is a key requirement in mobile and other embedded applications. Accurate power estimation during design phase is a key enabler for designing a power optimized SoC. Abstracting accurate power models for complex IPs such as embedded memories is a challenging task. At the same time, the complex modules have a large share in total power consumption of an IC. In this paper we analyze various challenges in accurately modeling power of embedded memories and propose a novel approach to model power within the framework of existing power analysis methodology.
  • Keywords
    embedded systems; industrial property; integrated circuit design; integrated memory circuits; logic design; low-power electronics; system-on-chip; IC power consumption; accurate power estimation models; complex IP; dummy logic wrapper; embedded memories; low power consumption; memory power modeling; power optimized SoC design; Computer Society; Energy consumption; Information analysis; Instruments; Integrated circuit modeling; Mobile computing; Performance analysis; Random access memory; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Symposium on VLSI, 2008. ISVLSI '08. IEEE Computer Society Annual
  • Conference_Location
    Montpellier
  • Print_ISBN
    978-0-7695-3291-2
  • Electronic_ISBN
    978-0-7695-3170-0
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2008.15
  • Filename
    4556805