Performance analysis of an all digital BPSK demodulator

A simulation algorithm was developed to analyze the performance of the binary phase shift key (BPSK) Costas loop coupled to the symbol sync loop (SSL). This algorithm was developed using COMDISCO´s Signal Processing Work System. Inputs to the algorithm included the signal parameters and receiver specifications, such as Costas and symbol sync loop bandwidths and update rates. The analysis was performed for various signal-to-noise ratios and loop parameters. The bit-error rate (BER), the SSL, Costas loop tracking variances, and the receiver acquisition time results include the two-way coupling effects between the Costas loop and the symbol sync loop. To provide statistical stability, final results were generated by averaging the simulation outputs; using various random noise seeds, initial carrier phases, and symbol timings. The tracking variance and BER results were further compared to their theoretical and experimental counterparts. This comparison has shown that simulation results are within 0.25 dB of their theoretical and experimental counterparts. Based on these results, the simulation models can be used for predicting the demodulator´s performance under various tracking conditions