Multibranch mobility characterization: Evidence of carrier mobility enhancement by back-gate biasing in FD-SOI MOSFET

Author

Navarro, C. ; Rodriguez, N. ; Donetti, L. ; Oliata, A. ; Gamiz, F. ; Andrieu, F. ; Faynot, O. ; Fenouillet-Berangerand, C. ; Cristoloveanu, S.

Author_Institution

Nanoelectron. Res. Group, CITIC-Univ. of Granada, Granada, Spain

fYear

2012

fDate

17-21 Sept. 2012

Firstpage

209

Lastpage

212

Abstract

The multibranch mobility analysis is used for the detailed characterization of the carrier mobility in SOI-MOSFETs. This technique shows the actual mobility dependence on the effective field in the device, allowing the separation of the contributions of the carriers located at the front- and backinterfaces. Measurements indicate that the mobility increases in thin and thick-BOX transistors when a back-gate bias is applied. The results demonstrate the impact of the distributions of carriers and electric field in the transistor body.

Keywords

MOSFET; carrier mobility; separation; silicon-on-insulator; FD-SOI MOSFET; SOI-MOSFET; back interface; back-gate biasing; carrier distribution; carrier mobility enhancement; electric field distribution; front-interface; mobility dependence; multibranch mobility analysis; multibranch mobility characterization; separation; thick-BOX transistors; thin-BOX transistors; transistor body; Approximation methods; Charge carrier processes; Logic gates; MOS devices; Scattering; Silicon on insulator technology; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European

Conference_Location

Bordeaux

ISSN

1930-8876

Print_ISBN

978-1-4673-1707-8

Electronic_ISBN

1930-8876

Type

conf

DOI

10.1109/ESSDERC.2012.6343370

Filename

6343370