A Novel and Scalable RSA Cryptosystem Based on 32-Bit Modular Multiplier

In this paper, we propose a scalable RSA cryptosystem chip, which is implemented with a 32-bit modular multiplier. Our design provides the trade-off between security and computation time. If the security is more important, we can choose longer key to get higher security. Otherwise, the shorter key could be chosen to reduce the computation time. The RSA core takes 2.83 M clocks to finish a 512-bit modular exponentiation in average and the critical path delay is only 3.2 ns. Since a 32-bit modular multiplier is adopted, our chip has lower power and smaller area.