Noise margins of threshold logic gates containing resonant tunneling diodes

Author

Bhattacharya, M. ; Mazumder, P.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

fYear

1998

fDate

19-21 Feb 1998

Firstpage

65

Lastpage

70

Abstract

Threshold gates consisting of RTDs in conjunction, with HBTs or CHFETs or MOS transistors can form extremely compact, ultrafast, digital logic alternatives. The resonant tunneling phenomenon causes these circuits to exhibit super-high-speed switching capabilities. Additionally, by virtue of being threshold logic gates, they are guaranteed to be more compact than traditional digital logic circuits while achieving the same functionality. However, reliable logic design with these gates will need a thorough understanding of their noise performance and power dissipation among other things. In this paper, we present an analytical study of the noise performance of these threshold gates supplemented by computer simulation results, with the objective of obtaining reliable circuit design guidelines

Keywords

bipolar logic circuits; heterojunction bipolar transistors; integrated circuit noise; logic gates; nanotechnology; resonant tunnelling diodes; threshold logic; CHFETs; HBTs; MOS transistors; circuit design guidelines; digital logic; functionality; noise performance; power dissipation; resonant tunneling diodes; super-high-speed switching capabilities; threshold logic gates; Circuit noise; Logic circuits; Logic design; Logic gates; MOSFETs; Power dissipation; RLC circuits; Resonance; Resonant tunneling devices; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on

Conference_Location

Lafayette, LA

ISSN

1066-1395

Print_ISBN

0-8186-8409-7

Type

conf

DOI

10.1109/GLSV.1998.665201

Filename

665201