• DocumentCode
    2016128
  • Title

    A Direct Sampling Mixer with complex coefficient transfer function in 65nm CMOS

  • Author

    Morishita, Yohei ; Morita, Tadashi ; Saito, Noriaki ; Araki, Kiyomichi

  • Author_Institution
    Commun. Core Devices Dev. Center, Panasonic Corp., Yokohama, Japan
  • fYear
    2011
  • fDate
    5-7 June 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The Direct Sampling Mixer (DSM) with complex coefficient transfer function is demonstrated. The operation theory and the detail design methodology are discussed for the 2-parallel architecture, which can achieve large image rejection by introducing the attenuation pole at the image frequency band. The proposed architecture was fabricated in a 65nm CMOS process. The measured results agree well with the theoretical calculation, which proves the validity of the proposed architecture and the design methodology. By using the proposed design method, it will be possible for circuit designers to design the DSM with large image rejection ratio without repeated lengthy simulations.
  • Keywords
    CMOS integrated circuits; mixers (circuits); transfer functions; 2-parallel architecture; CMOS process; attenuation pole; complex coefficient transfer function; direct sampling mixer; image rejection ratio; size 65 nm; Attenuation; Capacitance; Clocks; Design methodology; IIR filters; Mixers; Transfer functions; Attenuation Pole; Charge Domain Filter (CDF); Complex Filter; Direct Sampling Mixer (DSM); IIR filters; Image Rejection Mixer (IRM); Reconfigurable architectures;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE
  • Conference_Location
    Baltimore, MD
  • ISSN
    1529-2517
  • Print_ISBN
    978-1-4244-8293-1
  • Electronic_ISBN
    1529-2517
  • Type

    conf

  • DOI
    10.1109/RFIC.2011.5940598
  • Filename
    5940598